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Wenhai Xinchao and AI Chip Design

I have recently been learning about AI chips, which led to the notes below.

Ordinary people might ask: I know chips are part of my life, but what does understanding them have to do with me?

It really has little to do with me, so you do not have to learn about them. I am just curious. 😂

It does.

Once AI chip production becomes possible, ordinary people can benefit directly. The electronics we buy may cost less; upgrade cycles may become shorter; devices may use less power and stay smooth for longer... Then another question appears: why can adding AI to chips change our lives? How does it do that?

Many people do not know the major characteristics of chip making: talent is scarce, R&D costs are high, processes are complex and difficult, and production cycles are long. Chip making has three stages: design, manufacturing, and packaging and testing. Design is arguably the longest part of the entire cycle, currently measured in years.

First, a simple introduction to chip design.

1. We define requirements: what functions should the chip achieve?

2. Then comes RTL, Register Transfer Level. We use a hardware-description language to express circuit behavior and data flow between registers. This defines the chip's logical structure.

3. Once RTL is written, it needs simulation and verification. Different tests confirm whether the logic is correct and whether there are bugs. This is the most time-consuming stage and the one with the most repetition.

4. After functional verification, RTL is synthesized into a circuit structure made of logic gates and flip-flops.

5. Next comes physical design. EDA tools place and route that circuit structure on the chip's two-dimensional plane, or layout. They place each circuit cell at specific coordinates, then connect them with a metal wiring grid.

6. The completed layout needs a series of physical checks to make sure it can be manufactured and run.

7. When all physical checks pass, the layout is the design draft submitted to the manufacturer. Then manufacturing, packaging, and testing follow, and finally we get a physical chip.

In one sentence: define requirements, describe the hardware logic in RTL, verify the logic, generate the circuit structure, place and route it in a layout, complete physical verification, submit the design to a manufacturer, and make a physical chip.

If that still does not make sense, I found two videos (from Neo Park; shared only for curiosity, with no other purpose). If you are very curious, go watch them. They are so interesting! (Though this may be useless knowledge... 🤔)

Chip making is driven by both talent and capital. Design relies most on knowledge and talent, and takes the longest. Manufacturing relies most on physical capital — money — and both construction and production cycles are very long. Packaging and testing are the least capital-intensive and take the shortest time.

While learning about this, I found out that manufacturing, packaging, and testing were not originally done by one company in sequence. Only after TSMC developed advanced packaging could manufacturing, packaging, and testing be integrated in the high-performance market. In the mainstream and legacy market, outsourced companies still lead packaging and testing. That means those outsourcing firms have to work harder too, or the top companies will take all the high-profit market.

The company I will mention next is called Wenhai Xinchao. It is trying to solve two major difficulties in the design stage of chip making: talent cost and design cycle length. Okay, the following may become a little industry-specific. I will not explain too much for now; if necessary, I can come back and think through it. 😂

Wenhai Xinchao

01. Key information

Company: Nanjing Wenhai Xinchao Technology Co., Ltd., usually shortened to Wenhai Xinchao.

Founded: March 18, 2024

Funding stage: angel round, October 2024

Core mission: build ChatCPU, an automated chip-design platform based on large language models.

Wenhai Xinchao is trying to be the first company in China to build an end-to-end automated process from natural language to specification, RTL verification, tape-out, and a chip demo. It already has an AI-chip demo. This exploration is at the global frontier, but public sources still do not show real commercial tape-outs, mass production, or publicly available PPA data — performance, power, and area — from AI-computing chip, MCU, or automotive-electronics manufacturers.

02. Market

Chip design is facing two structural trends:

- Demand for custom chips is growing quickly. Vertical areas such as AI computing, MCUs, and automotive electronics are moving from general-purpose chips to specialized chips.

- EDA, electronic design automation, has serious efficiency bottlenecks: long cycles, scarce talent, high costs, and weak iteration.

Wenhai Xinchao's direction belongs to AI-native EDA, a market where there is still no clear global winner.

03. Product and technology

- A technical path already completed: in May 2023, the team designed the world's first processor chip automatically generated by a large language model. It completed an end-to-end, full-stack automated path from design specification to chip design, verification, performance models, reference models, and automatic migration of cell libraries. This suggests AI-native chip design may become real.

- ChatCPU is essentially a spec-to-silicon automation platform. Its core abilities include:

- natural-language understanding

- specification parsing

- automatic RTL generation

- automatic verification paths

- code optimization

- full-process automation

- A cell library is the base system that forms logic units in a chip. Moving it across processes is expensive. If Wenhai Xinchao can do this, it could directly compress costly recurring time in chip design. This would be a potential moat-level breakthrough.

04. Team

- Founder and CEO Wang Xi: Tsinghua and overseas PhD background, with more than ten years of processor-design and EDA-tool-development experience

- COO Wang Xinze: algorithms background, serial entrepreneur, and second place in a global generative-AI design-chip competition

- CTO Yin Guohua: works on AI-enabled chip design, with a balance of academic and engineering experience

- The team won the final of the 2024 Hong Kong University of Science and Technology Million Dollar International Entrepreneurship Competition in Shenzhen.

The team's advantage is its combined discipline strength: people who understand NLP, digital IC design, EDA toolchains, and process flows at the same time.

05. Commercialization

Publicly verifiable progress so far includes:

- a chip demo

- startup-competition awards

- entry into incubators, with policy and local support

- angel investment from MiraclePlus

But we still have not seen:

- a real enterprise-customer pipeline

- commercial-grade tape-outs

- mass-production plans

- public PPA data

- customer-validation reports

So the technology has bright spots, but commercialization is still at the zero-to-one stage.

06. Risks

Things worth watching:

- Can the technology scale? A demo is not a commercial-grade chip, and there is no public data.

- Customer validation is missing. Public sources still do not reveal real partner manufacturers.

- The team has very high talent density and is highly dependent on core founders.

- It is capital-intensive: AI plus chips is a money-burning combination.

- The cycle is long. From demo to tape-out to mass production usually takes 18–36 months.

07. My view

In an era when AI can empower a one-person unicorn, leverage in software is unlimited. Traditional EDA processes are extremely anti-leverage: they need huge investments of people, time, and capital. ChatCPU may look like a product-manager-level tool for generating chips, but after looking closer, that is not what it is. The key to success is not whether it can make a ChatGPU. It is whether it can build a new pipeline that keeps moving from input to output. Once that pipeline works, it lowers the barrier to chip design and could make ‘democratizing chip design’ possible. So far, its narrative is recognized in the industry. But the future would look more promising if it could publicly deliver these things one by one:

1. Reach an intention to cooperate with its first enterprise customer

2. Complete one verifiable commercial-grade tape-out and publish PPA data

3. Show cell-library migration across processes

4. Show one or two real enterprise project pipelines

Wenhai Xinchao's exploration may eventually build a new industry paradigm. The risk is high, but its strategic value is high too.

Finally, I think the core of Wenhai Xinchao's narrative should be ‘small team, AI chips, short cycles.’ The result — what it unlocks — matters more than the process, or the tool. As a SaaS product, its value proposition is at the PaaS level.

As someone with an EIE background — actually, a poor student — this is barely within my comfort zone. My learning and understanding are limited, so please correct me if I got anything wrong. 😢